1. Field of Invention
The present invention relates to the gate circuits of MOS gate type semiconductor elements.
2. Description of the Related Art
MOS gate type semiconductor elements have many advantages, such as small gate circuits and low energy consumption compared with thyristor semiconductor elements.
FIG. 1 is a block diagram of a single-phase inverter that uses MOS gate type semiconductor elements.
In FIG. 1, S1.about.S4 are MOS gate type semiconductor elements, 3 is a capacitor and 4 is the load. Here, a plurality of IEGT are used as the MOS gate type semiconductor elements.
Gate circuits G1.about.G4 are connected to MOS gate type semiconductor elements S1.about.S4. The detail of this is shown in FIG.2.
The gate circuit has ON gate power source E.sub.on, OFF gate power source E.sub.off, turn-on switch SW.sub.on, and turn-off switch SW.sub.off. The node between turn-on switch SW.sub.on and turn-off switch SW.sub.off is connected to gate G of the MOS gate type semi-conductor element via gate resistor R.sub.g. The node between ON gate power source E.sub.on and OFF gate power source E.sub.off is connected to emitter E of the MOS gate type semiconductor element.
Normally, about 15V is used for ON gate power source E.sub.on and OFF gate power source E.sub.off, and about 10.quadrature.for gate resister R.sub.g.
The relationship between MOS gate type semiconductor elements S1 and S2 or between MOS gate type semiconductor elements S3 and S4 is referred to as that of upper and lower arms in a single-phase inverter. Normally, upper and lower arms, for example MOS gate type semiconductor elements S1 and S2, do not switch simultaneously. One or other puts the gate circuit in a negative bias state so that there is no fire (turn-on), and the other is switched ON/OFF.
However, there are the following problems with prior art gate circuits.
Provided the gate potential of the element, for example element S1, that is negatively biased is sufficiently negatively biased, there is no problem. However, when the other element, S2, turns ON, if the gate potential of element S1, that is to say the negative bias potential, is transiently overcome by the positive side as shown in FIG. 3, element S1 will also turn ON. Thus, the arm is shorted out by elements S1 and S2 turning ON simultaneously.
This phenomenon of the transient overcoming of the negative bias is becoming a problem as MOS gate type semiconductor elements are being made to withstand higher voltages.
Another problem occurs when attempting to turn OFF multiple parallel-connected elements with one gate circuit. That is to say, the gate potentials of the elements become unstable and current unbalance arises through the generation of circulating currents between the gate circuit emitter wiring and the principal circuit emitter wiring.
This phenomenon is explained using FIG. 4 and FIG. 5. FIG. 4 is a block diagram of a single-phase inverter in which each arm is composed of two parallel-connected elements. FIG. 5 is an expanded detail drawing of part of FIG. 4.
Here, elements S11 and S12 are in the conductive state and a current is flowing; then elements S11 and S12 are turned off to break the current. When this is done, currents i.sub.11 and i.sub.12 generate the circulating current of loop A. The potentials of the emitter elements for the gates of elements S11 and S12 oscillate due to variation of this current and the wiring impedance, and current-unbalance occurs.